Reduce Power Consumption!
Improve Performance!
Maximize Interchip Bandwdidth!
Maximum Functionality!
Minimize Package Footprint!
Lower System Cost!
Manage System Complexity!
Higher Levels of Integration!
"We've moved beyond the era of two dimensional chips. The costs in terms of power consumption, performance, functionality and die size are simply to great to continue development on that path. The next wave of chip innovation will center around 3D die stacking, with through silicon vias and very fine grained alignment. This is absolutely nothing short of a revolution in semiconductor development.
Chips will never be the same!"
"We have reached the perilous edge of die area expansion. There's simply no where else to go. Since we can't keep pushing out, we have to move up. Much like boundary constrained urban areas, the inevitable pressure to grow forces the development of sky scrapers. For semiconductors, the Z dimension allows us to increase performance and functionality, while keeping power consumption, costs and package size low.
The new frontier is UP!"
The overwhelming trend in electronics is more computing power packed into smaller, often battery powered, devices.
As demonstrated by the Nexus One and the iPhone, users are demanding dramatically increased functionality, much better performance, true mobility and innovative interfaces. These requirements force system designers to cram ever more components into smaller areas and with roughly the same power supply.
At 4DChips, we believe that truly leading edge applications will only be realized by taking advantage of vertical die stacking to address the demanding requirements of today's systems. We are fully committed to developing technologies and providing services that enable system designers to blast through current design constraints.
Image Credit: unknown
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Vertical Integration! |
© 2010 by 4DChips |
| Jul 28, 2010 | - | Farewell Tier Logic - We hardly knew you | |
| Jun 07, 2010 | - | TSMC Vaporware: 3-D "Ecosystem" | |
| Mar 30, 2010 | - | Elpida Prepping for 3-D Commercialization | |
| Mar 30, 2010 | - | New Equipment for 3-D from Applied | |
| Mar 23, 2010 | - | SanDisk 32GB microSDHC Stacks 8 4GB die | |
| Mar 22, 2010 | - | IMAPS Device Packaging Conference | |
| Mar 22, 2010 | - | Quantum Film — CMOS Image Sensor Killer? | |
| Mar 17, 2010 | - | Novellus & IBM Form Cu TSV Joint Dev Program | |
| Mar 16, 2010 | - | IBM Chilling Chip Stacks with Microfluidics | |
| Mar 11, 2010 | - | IMEC Using Synopsys TCAD Sim Tools | |
| Mar 11, 2010 | - | Tier Logic Uncloaks – A 3D FPGA Company! | |
| Mar 11, 2010 | - | IEEE CPMT-SCV Meeting - 3D IC Integration |

Image Credit: engadget